The present invention relates, in general, to testing semiconductor devices and, more particularly, to testing non-singulated semiconductor devices which are attached to a leadframe.
After fabrication, semiconductor devices are usually placed in packages for protection from mechanical stresses. The steps used in packaging semiconductor devices generally include mounting a plurality of semiconductor devices to a leadframe, forming wire bonds between the semiconductor devices and the leadframe, and encapsulating the semiconductor devices within a molding compound. Subsequently, the leadframe is trimmed, formed, and separated, thereby producing individual or singulated packaged semiconductor devices.
Semiconductor devices mounted to a leadframe may be electrically tested after the trimming step because they are electrically isolated from one another. However, most semiconductor device manufacturers do not test the packaged semiconductor devices until after they have been singulated. Electrically testing the packaged semiconductor devices prior to singulation is tricky because the leadframe leads are in a very fragile and vulnerable position and may, therefore, be easily damaged. Any damage to the leads amounts to destroying the packaged semiconductor device. The probability of damaging the leads is reduced by performing the steps of trimming, forming, and singulation sequentially using the same apparatus.
Littlebury, in U.S. Pat. No. 5,008,615 entitled "Means and Method for Testing Integrated Circuits Attached to a Leadframe" discloses a means and method for testing integrated circuits after they have been encapsulated but before they have been singulated. In particular, the technique of Littlebury relies on testing the encapsulated semiconductor devices after the leadframe leads have been partially "formed".
Accordingly, it would be advantageous to have a method for electrically testing packaged semiconductor devices prior to singulation. More particularly, the method should test the encapsulated semiconductor devices before the leads are "formed". Further, it would be advantageous that the method reduce cycle time and testing costs. The method should also reduce the number of times the singulated packaged semiconductor devices are handled.